Research Seminar 'New Trends in Artificial Intelligence Chip Design in Silicon Valley'
On October 22, 2018, an open research seminar 'New Trends in Artificial Intelligence Chip Design in Silicon Valley' was held at the Laboratory of Automated Design Systems head by Associate Professor A.Yu. Romanov).
Yuri Panchul, Senior Engineer with Wave Computing (Campbell, California) was the guest speaker.
Yuri Panchul talked about his experience in the development of hardware neural systems (a joint project of the accelerator of neural networks Wave / Broadcom) for an advanced technological level of 7 nm while working at Wave Computing.
Yuri Panchul described new technical solutions and innovations used in the development of such systems, as well as the general structure of neurochips and set-up of calculations in them.
Yuri Panchul also told about the team engaged in such developments:
- chip architects;
- modeling specialists;
- register-transfer level designers;
- functional verification specialists;
- physical design specialists;
- validation of manufactured chips engineers;
- compiler group.
The seminar aroused a keen interest among students, and the auditorium was packed - more than 60 employees and students of HSE attended the seminar. There were also many guests from other enterprises (more than 20 people), including those from JSC Baikal Electronics, JSC Research and Production Center ELVIS, MIPT, JSC InSIS, Federal State Institution FNTS NIISI RAN, Samsung R & D Institute Rus, Cyberphysics Ltd., Research Samsung Center, SmaSS, UNIVEDA LLC, Hi-Tech, etc.
Seminar video recording: